In a semiconductor device with ultra-high breakdown voltage (a breakdown voltage of 10 kV or more), which is obtained using silicon carbide (SiC), a drift layer is designed to have a low impurity concentration and a large thickness to secure a breakdown voltage. The drift layer usually includes a SiC epitaxial growth layer formed on a SiC support substrate with a high impurity concentration by epitaxial growth, the SiC epitaxial growth layer having a low impurity concentration.
The impurity concentration of SiC is generally controlled by changing the doping concentration of nitrogen atoms when the conductivity-type is a n-type. The nitrogen atom can replace the carbon atom in its position in the SiC crystal, and act as a donor. The nitrogen atom has an atomic radius smaller than that of the carbon atom, and therefore when the SiC crystal is doped with nitrogen, the lattice constant decreases.
When a SiC epitaxial growth layer with a low impurity concentration is formed on a SiC support substrate with a high impurity concentration, a lattice mismatch occurs due to a difference in lattice constant between the SiC support substrate and the SiC epitaxial growth layer, so that large warpage occurs in a SiC epitaxial substrate including the SiC support substrate and the SiC epitaxial growth layer.
Specifically, due to compressive stress of the SiC epitaxial growth layer, the SiC epitaxial substrate is convexly warped so as to protrude toward the SiC epitaxial growth layer. When warpage of the SiC epitaxial substrate is large, the SiC epitaxial substrate may be cracked in a process for manufacturing a SiC semiconductor device, particularly in steps which give a heat shock through a heat treatment etc. Further, there is the problem that when the breakdown voltage of the SiC semiconductor device is to be made higher, a SiC epitaxial growth layer with a lower impurity concentration and a larger thickness is required, and therefore warpage of the SiC epitaxial substrate further increases.
It has been proposed that as disclosed in, for example, Patent Document 1, a buffer layer having a gradually inclined structure in which the impurity concentration is gradually changed or a continuously inclined structure in which the impurity concentration is continuously changed is provided between a SiC support substrate and a SiC epitaxial growth layer for reducing a lattice mismatch between the SiC support substrate and the SiC epitaxial growth layer.
Patent Document 2 discloses a technique in which in a group III nitride semiconductor substrate, the wrap of the substrate is reduced by implantation of ions from each of main surfaces of the substrate to form an ion implantation region having a predetermined depth on both main surface sides of the substrate.
However, with a method in which a buffer layer is provided between a SiC support substrate and a SiC epitaxial growth layer as in Patent Document 1, warpage after formation of the SiC epitaxial growth layer (before formation of a semiconductor element) is reduced, but warpage of the SiC epitaxial substrate, which occurs under semiconductor element formation conditions (e.g. ion implantation conditions), cannot be avoided.
With the method disclosed in Patent Document 2, i.e. a method in which an ion implantation region is formed on both main surfaces of a semiconductor substrate to control warpage of the substrate, warpage of the substrate before formation of a semiconductor element can be suppressed, but there is a doubt about whether warpage of the substrate after formation of the semiconductor element can be suppressed.